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high speed, esd - protected, half - /full - duplex i coupler isolated rs -4 85 transceiver adm2491e rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other right s of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2007 C 2010 analog devices, inc. al l rights reserved. features isolated, rs - 485/rs - 422 transceiver, configurable as half - or full - duplex 8 kv esd protection on rs - 485 input/output pins 16 mbps data rate complies with ansi tia/eia rs - 485 -a- 1998 and iso 8482: 1987(e) suitable for 5 v or 3.3 v operation (v dd1 ) high common - mode transient immunity: >25 kv/ s receiver has open - circuit, fail - safe design 32 nodes on the bus thermal shutdown protection safety and regulatory approvals ul recognition: 5000 v rms is o lation voltage for 1 minute, per ul 1577 vde certificate of conformity din v vde v 0884 - 10 (vde v 0884 - 10): 2006 - 12 reinforced insulation, v iorm = 848 v peak operating temperature range: ?40c to +85c wide body, 16 - lead soic package applications isolated rs - 485/rs - 422 interfaces industrial field networks interbus multipoint data transmission systems functional block dia gram v dd1 gnd 1 a b v dd2 gnd 2 y z txd de rxd adm2491e 06985-001 ga lv anic isol a tion re figure 1. general description the adm2491e is an isolated data transceiver with 8 kv esd protection and is suitable for high speed, half - or full - duplex communication on multipoint transmission line s. for half - duplex operation, the transmitter outputs and the receiver inputs share the same transmission line. transmitter output pin y is linked externally to receiver input pin a, and transmit - ter output pin z is linked to receiver input pin b. the adm 2491e is designed for balanced transmission lines and complies with ansi tia/eia rs - 485 -a- 1998 and iso 8482: 1987(e). the device employs analog devices, inc., i coupler? technology to combine a 3 - channel isolator, a three - state differential line driver, and a differential input receiver into a single package. the differential transmitter outputs and receiver inputs feature electrostatic discharge circuitry that provides protection to 8 kv using the human body model (hbm). the logic side of the device can be powered with either a 5 v or a 3.3 v supply, whereas the bus side requires an isolated 5 v supply. the device has current - limiting and thermal shutdown features to protect against output short circuits and situations in which bus contention could cause ex cessive power dissipation. the adm2491e i s available in a wide body, 16 - lead soic package and operates over the ?40c to +85c temperature range.
adm2491e rev. b | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing specifications .................................................................. 4 package characteristics ............................................................... 4 regulatory information ............................................................... 4 insulation and safety - related specifications ............................ 5 vde 0884 insulation characteristics ........................................ 5 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and f unctional descriptions .......................... 7 test circuits ....................................................................................... 8 switching characteristics .................................................................9 typical performance characteristics ........................................... 10 circuit description ......................................................................... 12 electrical isolation ...................................................................... 12 truth tables ................................................................................. 12 thermal shutdown .................................................................... 13 fail - safe receiver inputs ........................................................... 13 magnetic field immunity .......................................................... 13 applications information .............................................................. 14 isolated power supply circuit .................................................. 14 pcb layout ................................................................................. 14 typical applications ................................................................... 15 outline dimensions ....................................................................... 16 ordering guide .......................................................................... 16 revision history 12 /10 rev. a to rev. b changes to figure 31 ...................................................................... 15 12/08 rev. 0 to rev. a updated regulatory approval status throughout ...................... 1 changes to table 7 ............................................................................ 6 10/ 07 revision 0: initial version
adm2491e rev. b | page 3 of 16 specifications all voltages are relative to their respective ground; 3.0 v v dd1 5.5 v, 4.5 v v dd2 5.5 v. all m inimum/maximum specifications apply over the entire recommended operation range, unless otherwise not ed. all typical specifications are at t a = 25c, v dd1 = v dd2 = 5.0 v, unless otherwise noted. table 1. parameter symbol min typ max unit test conditions supply current power supply current, logic side txd/rxd data ra te = 2 mbps i dd1 3.0 ma unloaded output txd/rxd data rate = 16 mbps i dd1 6 ma half - duplex configuration, r termination = 120 ?, see figure 5 power supply current, bus side txd/rxd data rate = 2 mbps i dd2 4.0 ma unloaded output txd/rxd data rate = 16 mbps i dd2 50 ma v dd2 = 5.5 v, half - duplex configuration, r termination = 120 ?, see figure 5 driver differential outputs differential output voltage, loaded |v od | 2.0 5.0 v r l = 100 ? (rs - 422), see figure 3 1.5 5.0 v r l = 54 ? (rs - 485), see fig ure 3 1.5 5.0 v ?7 v v test1 12 v, see figure 4 ? |v od | for complementary output states ?|v od | 0.2 v r l = 54 ? or 100 ?, see figure 3 commo n- mode output voltage v oc 3.0 v r l = 54 ? or 100 ?, see figure 3 ? |v oc | for complementary output states ?|v oc | 0.2 v r l = 54 ? or 100 ? , see figure 3 output leakage current (y, z) i o 100 a de = 0 v, v dd2 = 0 v or 5 v, v in = 12 v ? 100 a de = 0 v, v dd2 = 0 v or 5 v, v in = ?7 v short - circuit output current i os 250 ma logic inputs de, re , txd input threshold low v il 0.25 v dd1 v input threshold high v ih 0.7 v dd1 v input current i txd ?10 +0.01 +10 a re ceiver differential inputs differential input threshold voltage v th ?0.2 +0.2 v input voltage hysteresis v hys 30 mv v oc = 0 v input current (a, b) i i +1.0 ma v oc = 12 v ?0.8 ma v oc = ?7 v line input resistance r in 12 k? logi c outputs output voltage low v olrxd 0.2 0.4 v i orxd = 1.5 ma, v a ? v b = ?0.2 v output voltage high v ohrxd v dd1 ? 0.3 v dd1 ? 0.2 v i orxd = ?1.5 ma, v a ? v b = 0.2 v short - circuit current 100 ma three - state output leakage current i ozr 1 a v dd1 = 5.5 v, 0 v < v out < v dd1 common - mode transient immunity 1 25 kv/s v cm = 1 kv, transient m agnitude = 800 v 1 cm is the maximum common - mode voltage slew rate that can be sustained while maintaining specification - compl iant operation. v cm is the common - mode potential difference between the logic and bus sides. the transient magnitude is the range over which the common mode is slewed. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges.
adm2491e rev. b | page 4 of 16 timing specification s t a = ?40c to +85c . table 2. parameter symbol min typ max unit test conditions driver maximum data rate 16 mbps propagation delay t plh , t phl 45 60 ns r l = 54 ? , c l1 = c l2 = 100 pf, see figure 6 and figure 10 pulse width distortion, t pwd = |t pylh ? t pyhl |, t pwd = |t pzlh ? t p zhl | t pwd 7 ns r l = 54 ? , c l1 = c l2 = 100 pf, see figure 6 and figure 10 single - ended output rise/fall times t r , t f 20 ns r l = 54 ? , c l1 = c l2 = 100 pf, see figure 6 and figure 10 enable time 55 ns r l = 110 ? , c l = 50 pf, see figure 8 and figure 11 disable time 55 ns r l = 110 ? , c l = 50 pf, see figure 8 and figure 11 receiver propagation delay t plh , t phl 60 ns c l = 15 pf, see figure 7 and figure 12 pulse width distortion, t pwd = |t plh ? t phl | t pw d 10 ns c l = 15 pf, see figure 7 and figure 12 enable time 13 ns r l = 1 k ? , c l = 15 pf, see figure 9 and figure 13 disable time 13 ns r l = 1 k ? , c l = 15 pf, see figure 9 and figure 13 package characterist ics table 3 . parameter symbol min typ max unit test conditions resistance (input to output) 1 r i - o 10 12 ? capac itance (input to output) 1 c i-o 3 pf f = 1 mhz input capacitance 2 c i 4 pf input ic junction - to - case thermal resistance jci 33 c/w thermocouple located at center of package underside output ic junction - to - case the rmal resistance jco 28 c/w 1 device considered a 2 - terminal device: pin 1, pin 2, pin 3, pin 4, pin 5, pin 6, pin 7, and pin 8 are shorted together , and pin 9, pin 10, pin 11, pin 12, pin 13, pin 14, pin 15, and pin 16 are shorted together. 2 input capacitance is from any inp ut data pin to ground. regulatory informati on table 4. ul 1 vde 2 r ecognized u nder the 1577 c omponent r eco g nition p rogram 1 c ertified according to din v vde v 0884 - 10 (vde v 0884 - 10): 2006 - 12 2 5000 v rms is o lation v oltage reinforced insulation, 846 v peak 1 in accordance with ul 1577, each adm2491e is proof tested by applying an insulation test voltage 6000 v rms for 1 second (current leakage detection limit = 10 a). 2 in accordance with din v vde v 0884 - 10, each adm2491e is proof tested by applying a n insulation test voltage 1590 v peak for 1 second (partial discharge detection limit = 5 pc).
adm2491e rev. b | page 5 of 16 insulation and safet y- related specificatio ns table 5. parameter symbol value unit conditions rated dielectric insulation volta ge 5000 v rms 1 minute duration minimum external air gap (clearance) l(i01) 7.7 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 8.1 mm min measured from input terminal s to output terminals, shortest distance along body minimum internal gap (internal clearance) 0.017 mm min insulation distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89) vde 0884 insulation characteristics this isolator is suitable for basic electrical isolation only within the safety limit data. maintenance of the safety data mu st be ensured by means of protective circuits. an a sterisk (*) on a package denotes vde 0884 approval for 848 v peak working voltage. table 6. description symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 300 v rms i to iv 450 v rms i to ii 600 v rms i to ii climatic classification 40/105/21 pollution degree (din vde 0110, see table 1 ) 2 maximum working insulation voltage v iorm 846 v peak input - to - output test voltage, method b1 v pr 1590 v peak v iorm 1.875 = v pr , 100% production tested, t m = 1 sec, partial discharge < 5 pc input - to - output test voltage, method a v pr after environmental tests, subgroup 1 1357 v peak v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5 pc afte r input and/or safety test, subgroup 2/subgroup 3 1018 v peak v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5 pc highest allowable overvoltage (transient overvoltage, t tr = 10 sec) v tr 6000 v peak safety - limiting values (maximum value al lowed in the event of a failure, see figure 20 ) case temperature t s 150 c input current i s, input 265 ma output current i s, output 335 ma insulation resistance at t s , v io = 500 v r s >10 9 ?
adm2491e rev. b | page 6 of 16 absolute maximum rat ings t a = 25 c, unless otherwise noted. each voltage is relative to its respective ground. table 7. parameter rating storage temperature ?55c to +150c ambient operating temperature ?40c to +85c v dd1 ?0.5 v to +7 v v dd2 ?0.5 v to +6 v lo gic input voltages ?0.5 v to v dd1 + 0.5 v bus terminal voltages ?9 v to +14 v logic output voltages ?0.5 v to v dd1 + 0.5 v average output current, per pin 35 ma esd (human body model) on a, b, y, and z p ins 8 kv ja thermal impedance 60 c/w stress es above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specif ication is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. esd caution
adm2491e rev. b | page 7 of 16 pin configuration an d functional descrip tions v dd1 1 gnd 1 2 rxd 3 re 4 v dd2 16 gnd 2 15 a 14 b 13 de 5 z 12 txd 6 y 11 nc 7 nc 10 gnd 1 8 gnd 2 9 nc = no connect adm2491e top view (not to scale) 06985-002 figure 2 . adm2491e pin configuration table 8 . pin function descriptions pin no. mnemonic description 1 v dd1 power supply (logic side). decoupling capacitor to gnd 1 required; capacitor value should be between 0.01 f and 0.1 f. 2 , 8 gnd 1 ground (logic side). 3 rxd receiver output. 4 re receiver enable input. active low logic input. when this pin is low, the receiver is enabled; when high, the receiver is disabled. 5 de driver enable input. active high logic input. when this pin is high, the driver (transmitter) is enabled; when low, the driver is disabled. 6 txd transmit data. 7 , 10 nc no connect. this pin must be left floating. 9 , 15 gnd 2 ground (bus side). 11 y driver no ninverting output. 12 z driver inverting output. 13 b receiver inverting input. 14 a receiver noninverting input. 16 v dd2 power supply (bus side). decoupling capacitor to gnd 2 is required; capacitor value should be between 0.01 f and 0.1 f.
adm2491e rev. b | page 8 of 16 test c ircuits v oc v od 06985-003 r l 2 r l 2 figure 3. driver voltage measurement 60? v od 375? 375? v test 06985-004 figure 4. driver voltage measurement v dd1 gnd 1 a b v dd2 gnd 2 y z txd de rxd adm2491e 06985-005 ga lv anic isol a tion r termination re figure 5 . supply current measurement test circuit c l2 c l1 r ldiff y z 06985-006 figure 6 . driver propagation delay c l v out a b 06985-007 figure 7 . receiver propagation delay 06985-008 y z v cc v out s2 s1 r l c l 0v or 3v de figure 8 . driver enable/disable 06985-009 a re b v cc v out s2 s1 r l c l re in +1.5v ?1.5v figure 9 . receiver enable/disable
adm2491e rev. b | page 9 of 16 switching characteri stics 1.5v 1.5v t plh t phl t r t f 1/2v out v out 90% point 10% point 90% point 10% point t pwd = | t plh ? t phl | v dd1 0v z y v oh v ol y, z txd 06985-010 figu re 10 . driver propagation delay, rise/fall timing t zl t lz t zh t hz 0.5v dd1 0.5v dd1 v ol + 0.5v v oh ? 0.5v 2.3v 2.3v de y, z y, z v dd1 0v v ol v oh 0v 06985-011 figure 11 . driver enable/disable delay a, b rxd 0v 0v 1.5v 1.5v t plh t phl v oh v ol 06985-012 figure 12 . receiver propagation delay t zl t lz t zh t hz 0.5v dd1 0.5v dd1 v ol + 0.5v v oh ? 0.5v 1.5v 1.5v re rxd rxd 0v v dd1 0v v ol v oh 0v 06985-013 output low output high figure 13 . receiver enable/disable delay
adm2491e rev. b | page 10 of 16 typical performance characteristics tempera ture (c) i dd1 supp ly current (ma) 06985-014 ?40 ?20 0 20 40 60 80 100 ? load 54 ? load 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 no load figure 14 . i dd1 supply current vs. temperature 0 10 20 30 40 50 60 tempera ture (c) 06985-015 ?40 ?20 0 20 40 60 80 i dd2 supp ly current (ma) no load 100 ? load 54 ? load figure 15 . i dd2 supply current vs. temperature 0 10 20 30 40 50 60 ?40 ?20 0 20 40 60 80 t pyhl 06985-034 temperature (c) delay (ns) t pzhl t pylh t pzlh figure 16 . driver propagation delay vs. temperature 0 10 20 30 40 50 60 ?40 ?20 0 20 40 60 80 06985-035 temperature (c) delay (ns) t plh t phl figure 17 . receiver propagation delay vs. temperature 06985-032 ch1 2v ch3 2v ch2 2v ch4 2v m20ns a ch1 2.32v 1 3 4 t 48ns : 2.12v @: 7.72v ? ? ? ? txd z y rxd figure 18 . driver/receiver propagation delay, low to high (r ldiff = 54 ?, c l1 = c l2 = 100 pf ) 06985-033 ch1 2v ch3 2v ch2 2v ch4 2v m20ns a ch1 3.24v 1 3 4 t 48ns : 2.12v @: 7.72v txd z y rxd ? ? ? ? figur e 19 . driver/receiver propagation delay, high to low (r ldiff = 54 ?, c l1 = c l2 = 100 pf )
adm2491e rev. b | page 11 of 16 case temper a ture (c) safety -limiting current (ma) 0 0 350 300 250 200 150 100 50 50 100 150 200 side 1 side 2 06985-020 figure 20 . thermal derating curve, dependence of safety - limiting values with case temperature per vde 0884 ?14 ?12 ?10 ?8 ?6 ?4 ?2 0 4.0 4.2 4.4 4.6 4.8 5.0 receiver output vo lt age (v) output current (ma) 06985-021 fi gure 21 . output current vs. receiver output high voltage 0 2 4 6 8 10 12 14 16 0 0.2 0.4 0.6 0.8 1.0 1.2 receiver output vo lt age (v) output current (ma) 06985-022 figure 22 . output current vs. receiver output low voltage 4.65 4.66 4.67 4.68 4.69 4.70 4.71 4.72 4.73 4.74 4.75 4.76 ?20 ?40 0 20 40 60 80 06985-036 temperature (c) voltage (v) figure 23 . receiver output high voltage vs. temperature, i rxd = ?4 ma 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 ?40 ?20 0 20 40 60 80 06985-037 temperature (c) voltage (v) figure 24 . receiver output low voltage vs. temperature, i rxd = C 4 ma
adm2491e rev. b | page 12 of 16 circuit description electrical isolation in the adm2491e, electrical isolation is implemented on the logic side of the interface. therefore, the part has two main sections: a digital isolation section and a transceiver section (see figure 25 ). the driver input signal, which is applied to the txd pin and referenced to logic ground (gnd 1 ), is coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (gnd 2 ). similarly, the receiver input, which is referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the rxd pin referenced to log ic ground. i coupler technology the digital signals are transmitted across the isolation barrier using i coupler technology. this technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. at the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. isol a tion barrier v dd2 v dd1 y z a b gnd 2 gnd 1 txd rxd re encode decode decode encode de decode encode d r transceiver 06985-025 digi tal isol a tion figure 25 . adm2491e digital isolation and transceiver sections truth tables the truth tables in this section use the abbreviations shown in table 9 . table 9 . truth table abbreviations letter description h hig h level l low level i indeterminate x irrelevant z high impedance (off ) nc disconnected table 10 . transmitting supply status inputs outputs v dd1 v dd2 de txd y z on on h h h l on on h l l h on on l x z z on off x x z z off on l l z z off off x x z z table 11 . receiving supply status inputs output v dd1 v dd2 a ? b (v) re rxd on on >0.2 l or nc h on on < ?0.2 l or nc l on on ?0.2 < a ? b < +0.2 l or nc i on on inputs open l or nc h on on x h z on off x l or nc h off off x l or nc l
adm2491e rev. b | page 13 of 16 thermal shutdown the adm2491e contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. shorting the driver outputs to a low impedance source can result in high driver currents. the thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. this circuitry is designed to disable the driver outputs when a die temperature of 150c is reached. as the device cools, the drivers are re - enabled at a temperature of 140c. fail - safe receiver inputs the receiver inputs include a fail - safe feature that guarantees a logic high on the rxd pin when the a and b inputs are floating or open circ uited. magnetic field immun ity because i coupler devices use a coreless technology, no magnetic components are present and the problem of magnetic saturation of the core material does not exist. therefore, i coupler devices have essentially infinite dc field im munity. the following analysis defines the conditions under which this may occur. the 3 v operating condition of the adm2491e is examined because it represents the most susceptible mode of operation. the limitation on the ac magnetic field immunity of t he i couple r is set by the condition that induced an error voltage in the receiving coil (the bottom coil in this case) that was large to either falsely set or reset the decoder. the voltage induced across the bottom coil is given by ? ? ? ? ? ? ? ?= 2 n r dt d v ; n n ,...,2,1 = where (if the pulses at the transformer output are greater than 1.0 v in amplitude): is the magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the n th turn in the receiving coil ( cm). the decoder has a sensing threshold of about 0.5 v; therefore, there is a 0.5 v margin in which induced voltages can be tolerated. given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0 .5 v margin at the decoder, a maximum allowable magnetic field is calculated, as shown in figure 26 . magnetic field frequenc y (hz) 1k 10k 100k 100m 1m 10m 100 10 1 0.1 0.01 0.001 maximum allo w able magnetic flux densit y (kgauss) 06985-026 figure 26 . maximum allowable external magnetic flux density for example, at a magnetic field frequenc y of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. similarly, if such an event occurs during a transmit ted pulse and is the worst - case polarity, it reduces the received pulse from >1.0 v to 0.75 v still well above the 0.5 v sensing threshold of the decoder. figure 27 shows the magnetic flux density values in terms of more familiar quantities, such as maximum allowable current flow, at given distances away from the adm2491e transformers. magnetic field frequenc y (hz) 1k 10k 100k 100m 1m 10m dis t ance = 1m dis t ance = 100mm dis t ance = 5mm 1000 100 0.1 1 10 0.01 maximum allo w able current (ka) 06985-027 figure 27 . maximum allowable current for various current -to- adm2491e spacings with combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces c an induce error voltages large enough to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility.
adm2491e rev. b | page 14 of 16 applications inform ation isolated power suppl y circuit the adm2491e requires isolated power capable of 5 v at up to approximately 75 ma (this current is dependent on the data rate and termination resistors used) to be supplied between the v dd2 and the gnd 2 pins. a transform er driver circuit with a center - tapped transformer and ldo can be used to generate the isolated 5 v supply, as shown in figure 28 . the center - tapped transformer provides electrical isolation of the 5 v power supply. the primary wi nding of the transformer is excited with a pair of square waveforms that are 180 out of phase with each other. a pair of schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. the adp3330 linear voltage regulator provides a regulated power supply to the bus - side circuitry (v dd2 ) of the adm2491e. isolation barrier v cc 78253 sd103c sd103c 22f 10f 5v out in sd err nr gnd v cc v dd1 v dd2 gnd 1 gnd 2 adp3330 adm2491e 06985-028 transformer driver v cc + + figure 28 . isolated power supply circuit pcb layout the adm2491e isolated rs - 485 transce iver requires no external interface circuitry for the logic interfaces. power supply bypass - ing is req uired at the input and output supply pins (see figure 29 ). bypass capacitors are conveniently connected between pin 1 and pin 2 for v dd1 and between pin 15 and pin 16 for v dd2 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. bypassing between pin 1 and pin 8 and between pin 9 and pin 16 should also be considered unless the ground pair on each package side is connected close to the package. v dd1 gnd 1 rxd re de txd nc gnd 1 v dd2 gnd 2 a b nc z y gnd 2 nc = no connect adm2491e 06985-029 figure 29 . recommended printed circuit board layout in applications involving high common - mode tr ansients, care should be taken to ensure that board coupling across the isola - tion barrier is minimized. furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this could cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch - up or permanent damage.
adm2491e rev. b | page 15 of 16 typical applications figure 30 and figure 31 show typical applications of the adm2491e in half - duplex and full - duplex rs - 485 network configurations. up to 32 transceivers can be connected to the rs - 485 bus. to minimize reflections, the line must be terminated at the receiving end in its character istic impedance, and stub lengths off the main line must be kept as short as possible. for half - duplex operation, this means that both ends of the line must be terminated because either end can be the receiving end. notes 1. r t is equal to the characteristic impedance of the cable. 2. isolation not shown. 06985-030 adm2491e rxd de txd a b z y adm2491e rxd de txd a b z y adm2491e adm2491e a b z y a b z y r1 r2 r t v cc r d r d r d r d r t rxd de txd rxd de txd maximum number of transceivers on bus = 32 re re re re figure 30 . adm2491e typical half - duplex rs - 485 network 06985-031 r d rxd r e txd de adm2491e adm2491e a b z y r d rxd t xd de a b z y re r d rxd txd de adm2491e master slave slave a b z y re maximum number of nodes = 32 adm2491e r d rxd txdde a b z y re slave notes 1. r t is equal to the characteristic impedance of the cable. r t v dd r1 r2 r t v dd r1 r2 figure 31 . adm2491e typical full - duplex rs - 485 network
adm2491e rev. b | page 16 of 16 outline dimensions controlling dimensions a re in millimeters; inch dimensions (in parent heses) are rounded-off millimeter equivalents for r eference only and are not appropriate for use in design. c ompliant to jedec standards ms-013-aa 10.50 (0.4134) 10.10 (0.3976) 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 16 9 8 1 1.27 (0.0500) bsc 03-27-2007-b figure 32 . 16 - lead standard small outline package [soic_w] wide body (rw - 16) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option ADM2491EBRWZ ?40c to +85c 16- lead standard small outline package, wide body [soic_w] rw -16 ADM2491EBRWZ C reel7 ?40c to +85c 16-le ad standard small outline package, wide body [soic_w] rw -16 1 z = rohs compliant part. ? 2007 C 2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06985 -0- 12/10(b)

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